This invention relates generally to computer processor operation, and more particularly to providing a method, system, and computer program product for address generation checking.
With the continuing development and use of modern computer systems, the demand has increased for processors that operate without causing data corruption. For example, computers or microprocessors are used in a number of critical functions where consistent, accurate processing is needed, such as life supporting medical devices, financial transaction systems, and automobile safety and control systems. A common approach to meet this demand is to duplicate processor circuitry and compare the resulting duplicate functionality to detect processor errors, such as errors in the generation of addresses that are used to access stored data for processing purposes. However, an increased amount of component space (or area), processing time (e.g., added delay or latency), and power is needed to provide such duplication of processor logic, which can be inefficient for various applications. Thus, an approach to check for such address generation errors without the use of duplicate circuitry is desirable.